800G QSFP-DD（AEC）
Short Description:
Based on MaxLinear MxL9368x 800G PAM4 DSP SoC
Product Detail
Product Tags
| Document No | ML-AEC-800G-QD-001 |
| Product Series | ML-AEC-QDD-800G-xxM |
| Revision | Rev. A0（Preliminary） |
| Release Date | 2026-07-13 |
| Confidentiality Level | Customer Confidential |
800Gb/s | 8×106.25Gb/s PAM4 | QSFP-DD | 1–5 m
Short-reach high-speed interconnection for data center switches, routers, servers and AI clusters
1. Product Overview
MoreLink ML-AEC-QDD-800G series is a dual-ended QSFP-DD packaged 800Gb/s active electrical cable. DSP chips with 8-channel PAM4 are integrated at both cable ends to perform clock data recovery, equalization, pre-emphasis and channel remapping for high-speed electrical signals, enabling stable 800G transmission over thin and long copper cables. This solution supports intra-rack and adjacent rack interconnections, including switch-to-switch, switch-to-server, and switch-to-accelerator links.
3. Part Number & Ordering Information
|
Part Number |
Port Interface |
Data Rate |
Length |
Cable AWG |
Remarks |
| ML-AEC-QDD-800G-01M | QSFP-DD ↔ QSFP-DD | 800Gb/s | 1 m | 30/32 AWG | Standard Stock |
| ML-AEC-QDD-800G-02M | QSFP-DD ↔ QSFP-DD | 800Gb/s | 2 m | 28/30 AWG | Standard Stock |
| ML-AEC-QDD-800G-03M | QSFP-DD ↔ QSFP-DD | 800Gb/s | 3 m | 26/28 AWG | Standard Stock |
| ML-AEC-QDD-800G-04M | QSFP-DD ↔ QSFP-DD | 800Gb/s | 4 m | 26/28 AWG | Optional |
| ML-AEC-QDD-800G-05M | QSFP-DD ↔ QSFP-DD | 800Gb/s | 5 m | 24/26 AWG | Optional |
4. Functional & Performance Specifications
4.1 High-Speed Electrical Specifications
|
Parameter |
Typical |
Unit & Description |
| Aggregate Line Rate | 800 | Gb/s |
| Number of Channels | 8 | Bidirectional differential channels |
| Single Channel Rate (PAM4) | 106.25 | Gb/s |
| Supported Compatible Rates | 53.125 PAM4 / 25.78125 NRZ | Gb/s |
| Host-side Differential Impedance | 100 | Ω |
| Input Coupling | AC Coupled | ~70 kHz high-pass corner at DSP side |
| Supported Host Channel Loss | >20 | dB @ Nyquist (chip capability) |
| Modulation Scheme | PAM4 | IEEE 802.3ck C2M |
| FEC | Implemented by Host System | Module acts as transparent retimer |
| Channel Mapping | 8×8 Crossbar | Polarity flip & channel remapping supported |
4.2 System Performance (Preliminary Target Values)
|
Parameter |
Target Spec |
Conditions & Notes |
| Link BER | Meet host system FEC threshold | Subject to host compatibility and full link testing |
| DSP Operating Mode | Retimer / Gearbox Transparent Forwarding | Default: 8×106.25G PAM4 |
| Link Establishment Time | ≤ 3 s | After power-on, firmware initialization and equalization completion |
| Hot Plug Support | Supported | Compliant with QSFP-DD module requirements |
| End-to-End Latency | TBD | Actual value measured per firmware version & cable length |
| Continuous Operation | 7×24 h | Under rated ambient conditions |
Note: Target specifications in this section are preliminary MoreLink product-level indicators, not guaranteed values from the chip datasheet. Final mass production specs will be frozen after EVT/DVT validation.
4.3 Management & Diagnostics
|
Function |
Support Status |
Description |
| Management Interface | I²C | Module address, page table and register definition follow MoreLink firmware specification |
| Digital Diagnostic Monitoring (DDM) | Supported | Real-time temperature, voltage, power consumption, alarm status |
| BER Monitoring | Supported | Mission-mode real-time BER tracking |
| SNR / Eye Histogram | Supported | Readable per individual receive channel |
| PRBS Test | Supported | Built-in generator, error counter & checker |
| Loopback Function | Supported | Host-side & line-side diagnostic loopback |
| LOS / LOL Signal Detection | Supported | Configurable squelch threshold & interrupt reporting |
| Firmware Upgrade | Supported | For production & field maintenance; separate upgrade procedure document available |
5. Power Supply & Power Consumption
|
Parameter |
Min |
Typical |
Max |
Unit & Test Conditions |
| Module Input Voltage (Per End) | 3.135 | 3.3 | 3.465 | V |
| Typical Power Consumption (Single End) | — | 8.5 | — | W, 25°C, 800G mode (preliminary) |
| Max Power Consumption (Single End) | — | — | 10.0 | W, full temperature range (preliminary) |
| Typical Total Power Consumption (Full Cable) | — | 17.0 | — | W, sum of both ends |
| Low Power Mode | Supported | Controlled via module management state machine | ||
| Power-on Surge Control | Controlled Soft Start | Meets hot-plug application requirements |
Design Reference: MxL93682 chip draws ~6.9 W under typical 800G operating conditions. Total module power consumption includes MCU, power conversion, clock circuit and cable loss. All power values are engineering budget estimates.
6. Environmental, Mechanical & Reliability Specifications
6.1 Environmental Operating Conditions
|
Parameter |
Specification |
| Operating Case Temperature | 0°C ~ +70°C (Commercial Grade); Optional -5°C ~ +85°C |
| Storage Temperature | -40°C ~ +85°C |
| Operating Relative Humidity | 5% ~ 85%, Non-Condensing |
| Storage Relative Humidity | 5% ~ 95%, Non-Condensing |
| Operating Altitude | ≤ 3,000 m (Recommended) |
| Compliance | RoHS / REACH compliant; formal test reports available upon mass production |
6.2 Mechanical Specifications
|
Parameter |
Specification & Description |
| Connector | 2 × QSFP-DD plug with pull-tab unlocking structure |
| Cable Construction | Multi-pair differential high-speed copper cable, 100 Ω differential impedance |
| Cable Outer Diameter | ~6.5–11.0 mm, varies with cable length & AWG |
| Minimum Bend Radius | Static ≥ 5×OD; Dynamic ≥ 10×OD |
| Mating Cycles | ≥ 100 cycles (Target) |
| Product Label | Model, Serial Number, Length, Date Code, Port Direction Marker |
| Housing Material | Metal shielding housing, optimized for EMI & ESD protection |
6.3 Reliability Validation Items
|
Test Item |
Test Conditions |
Pass Criteria |
| High Temperature Operating Burn-in | 70°C, continuous operation | No link drop, performance meets all specs |
| Temperature Cycling | -40°C ↔ +85°C | No mechanical damage, electrical performance fully functional |
| Mating Durability Test | 100 mating cycles | Latches, connectors and link performance intact |
| Vibration & Mechanical Shock | Per data center & transportation industry standards | No mechanical failure or performance degradation |
| ESD Immunity | Contact / Air discharge per system validation plan | No permanent damage, auto recovery after event |
| Long-Term BER Aging Test | Full-rate continuous operation | BER meets host FEC threshold throughout test duration |
7. Standards & Compatibility
- · IEEE 802.3bs / 802.3cd / 802.3ck / 802.3cm / 802.3cu / 802.3db / 802.3df (Applicable Clauses)
- · QSFP-DD Hardware Specification (Form factor, connector and module electrical requirements; exact version locked per project)
- · CMIS Management Framework (Version selected based on customer switch compatibility; register mapping defined by MoreLink firmware)
- · RoHS, REACH and halogen-free options configurable per project requirements
8. Application & Compatibility Notes
- · Typical Applications: 800G switch interconnection, ToR/Leaf/Spine short-reach links, AI/GPU compute clusters, server-to-accelerator connections
- · This product is an active electrical cable (AEC). Host ports must support the module power budget and QSFP-DD 800G electrical interface.
- · Different switch vendors implement CMIS, power class, equalization preset and alarm logic differently. Full compatibility validation is required prior to mass production.
- · No optoelectronic conversion integrated; not suitable for fiber transmission or electrically isolated scenarios.
9. Labeling & Packaging Requirements
|
Item |
Requirements |
| Unit Label | MoreLink Logo, Part Number, Cable Length, SN, P/N, Date Code, QR Code |
| Packaging Structure | Anti-static bag + Individual inner box + Export outer carton |
| Connector Protection | Dust caps for both QSFP-DD plugs |
| Attached Documents | Outgoing Inspection Record, Certificate of Conformity; Test reports provided per project demand |
| Minimum Pack Quantity | Confirmed by order & cable length combination |
10. Revision History
|
Revision |
Date |
Revision Description |
| A0 | 2026-07-13 | Initial release, preliminary product spec based on MxL9368x chip capability |
11. Important Disclaimer
This document is a preliminary draft specification for MoreLink 800G QSFP-DD AEC. Except items explicitly marked as chip datasheet or standard mandatory requirements, all parameters including power consumption, wire gauge, maximum length, operating temperature range, link establishment time, mechanical dimensions and reliability metrics shall be finalized and validated against final PCB, cable, connector, firmware and thermal design. The official released product specification will be updated after EVT/DVT sample testing, reviewed and approved by R&D, Quality, Sales and customer representatives.
Reference Datasheet: MaxLinear MxL93682/MxL93683 800G PAM4 DSP SoC Data Sheet, Rev. 083-9368xDSR06, Dated 2025-09-10